There has been a lot of new information available about the leading-edge logic processes lately. Papers from IEDM in December 2017, VLSIT this month, the TSMC and Samsung Foundry forums, etc. have all filled in a lot of information. In this article I will summarize what is currently known.… Read More
At Semicon West last week I attended presentations by Soitec and CEA Leti, and had breakfast with CEA Leti CEO Marie Semeria, key members of the Fully Depleted Silicon On Insulator (FDSOI) ecosystem. I have also seen some comments in the SemiWiki forum lately that make me believe there is some confusion on the roles of different companies… Read More
I have attended last week to the LETI Days in Grenoble, lasting two days to mark the 50[SUP]th[/SUP] anniversary of the CEA subsidiary. Attending to the LETI Days is always a rich experience: LETI is a research center counting about 3000 research engineers, but LETI is also a start-up nursery. The presentations are ranging from … Read More
Mahesh Tirupattur, EVP at low-power SERDES pioneer Analog Bits lead off the panel discussion at the recent FD-SOI Forum in Shanghai with the assertion that for anything “always on” in IoT, FD-SOI’s always better. They had a great experience porting their SERDES IP to 28nm FD-SOI (which they detailed last spring – see the ppt here… Read More
IoT architects face a dilemma in partitioning the compute power of their systems between the cloud and the edge. The cloud offers large storage and heavy duty compute power, making it an attractive place to perform the computation needed for IoT tasks. However, moving large amounts of data from the edge to the cloud servers, can … Read More
I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes. My Leading Edge Logic Landscape blog is available here.… Read More
I’ve done SRAM and DRAM design before as a circuit designer from 1978-1986, but in 2016 there are so many more challenges to using 28nm and 14nm on FDSOI technology. One way to keep abreast of SRAM design is to read conference papers, so I just finished a paper from authors at STMicroelectronics and MunEDA presented at the IEEE… Read More
Silicon Carbide (SiC) is a very interesting material. If you find in nature the mineral moissanite, it will be only minute quantities in certain types of meteorite. The moissanite physical properties are very similar to these of diamond, in term of density and abrasive power. In the semiconductor industry, SiC is characterized… Read More
We in Semiwiki are writing about FD-SOI since 2012, describing all the benefits offered by the technology in term of power consumption, price per performance compared with FinFET, etc. Let me assess again that I am fully convinced that FD-SOI is a very smart and efficient way to escape from the Moore’s law paradox: the transistor… Read More
If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More
